The complexity of integrated circuits has dramatically increased during the last decade. System-on-chip and other multiple-core integrated circuits are being developed in order to support various applications such as but not limited to multi-media applications, real time applications and the like.
Various protocols and buses were developed for exchanging information between semiconductor components. They include, for example, the I2C serial communication protocol, the Serial Peripheral Interface (SPI) serial communication protocol, and the PowerWise™ serial communication protocol.
The following patents and patent applications, all being incorporated herein by reference, provide a brief overview of various devices and method for exchanging information: U.S. Pat. No. 6,483,847 of Ross, titled “Arbitration scheme for a serial interface”; U.S. patent application publication number 20040049619 of Lin, titled “One wire serial communication protocol method and circuit”; U.S. patent application publication number 20040049611 of Kotlow et al., titled “Flexible port configuration and method”; U.S. patent application publication number 20040148446 and U.S. Pat. No. 6,697,884 of Katsch titled “Communication protocol for serial peripheral devices”; and U.S. patent application publication number 20030090939 of Perroni, et al. titled “Nonvolatile memory device with parallel and serial functioning mode and selectable communication protocol”.
Many power management schemes are being developed in order to reduce the power consumption of modern integrated circuits. These include, for example, clock frequency reduction, dynamic voltage scaling (DVS), dynamic body biasing, dynamic threshold scaling, adaptive body biasing, and the like.
The following patents and patent applications, all being incorporated herein by reference, provide a brief overview of various power management schemes: U.S. patent application 20040052098 of Burstein et al., titled “digital voltage using current control”; U.S. patent application 20030139927 of Gabara, et al., titled “Block processing in a maximum a posteriori processor for reduced power consumption”; U.S. patent application 20020000797 of Burstein et al., titled “Switching regulator with capacitance near load”; U.S. patent application 20040025068 of Gary et al., titled “Methodology for coordinating and tuning application power” and U.S. patent application 20010038277 of Burstein et al., titled “Digital voltage regulator using current control”.
There is a need to manage the access of multiple components to a shared bus in a power efficient manner.